/*
*	A module to Check When to Halt
*	CPU Should Halt When A Halt Instruction(OxFFFFFFFF) Come to Decode Phase
*	and The Instruction before it but still in pipeline do not change Answer State
*	(Here means they won't change register files and memory).
*/

module HaltChecker(
	InstrD,
	ChangeState,
	DoHalt
);
	input[31:0] InstrD;
	input ChangeState;
	output DoHalt;
	reg DoHalt,Halt;
	initial begin
		Halt = 0;
		DoHalt = 0;
	end
	
	always @(InstrD or ChangeState) begin
		if(InstrD == 32'hffffffff) Halt = 1;
		if(!ChangeState && Halt) DoHalt = 1;	
	end

endmodule
